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Simulation Study of Nanoscale FDSOI MOSFET Characteristics

DOI: 10.4236/snl.2023.133002, PP. 13-22

Keywords: Fully Depleted, Silicon on Insulator, Threshold Voltage, Subthreshold Slope, Leakage Current, Gate Length

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Abstract:

Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.

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