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- 2018
基于SiGe BiCMOS工艺的高速光接收机模拟前端电路
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Abstract:
基于IBM 0.18 ?m SiGe BiCMOS工艺, 设计了一款12.5 Gb/s的全差分光接收机模拟前端电路．该电路由跨阻放大器、限幅放大器、直流偏移消除电路和输出缓冲级组成．为获得更高的带宽, 本文对Cherry-Hooper结构进行了改进, 设计出一种三级级联的限幅放大器, 而直流偏移消除电路则使用了差分有源密勒电容(DAMC)来替代传统的片外大电容, 提高了电路集成度和稳定性．版图后仿结果表明, 在探测器等效电容为300 fF的情况下, 光接收机前端电路的跨阻增益为97 dB, -3 dB带宽为11.7 GHz, 等效输入噪声电流小于14.2 pA/, 芯片核心面积为720 ?m×700 ?m．
A fully differential analog front-end circuit for 12.5 Gb/s optical receiver was optimally designed with IBM 0.18 ?m SiGe BiCMOS technology，which included transimpedance amplifier(TIA)，limiting amplifier(LA)，DC offset cancellation(DOC)circuit and output buffer. To obtain wider bandwidth，the Cherry-Hooper structure was modified，and a cascaded limiting amplifier with three-stage Cherry-Hooper structures was proposed. Additionally，the DOC circuit adopted a differential active Miller capacitor(DAMC)to replace the traditional large off-chip capacitors，which was beneficial for improving the integration level and stability. Post-layout simulation results showed that the optical receiver front-end circuit had a -3 dB bandwidth of 11.7 GHz with a transimpedance gain of 97 dB while using a photodiode equivalent capacitance of 300 fF. The equivalent input noise current was less than 14.2 pA/ within the interesting band，and the size of core chip was 720 ?m×700 ?m
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