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OALib Journal期刊
ISSN: 2333-9721
费用：99美元
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基于Cache和层次Z缓存算法的3维图形深度消隐硬件设计和实现
DOI: 10.11834/jig.20090724
Keywords: 消隐,层次Z缓存,Z,Cache
Abstract:
为了在3维图形渲染硬件系统中节省带宽和提高消隐效率，基于Cache和层次Z缓存算法（hierarchicalZ-buffer，HZB），设计了一个深度消隐硬件模块。该硬件模块主要面向带宽有限的片上3维图形渲染系统，其在节省带宽的同时，还可加快消隐速度和提高消隐效率。该模块通过设计优化ZCache结构来获得较高命中率，并采用了1级层次Z缓存算法，以提高消隐效果，同时加入了快速Z清除(FastZClear）结构,以节省带宽。该设计已通过RTL级建模和仿真验证。实验结果表明，该新的硬件可节省大概30％的带宽，消隐速度和效率最多可提高20％。
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