Design of A Low Power Low Voltage CMOS Opamp

In this paper a CMOS operational amplifier is presented which operates at 2V power supply and 1uAinput bias current at 0.8 um technology using non conventional mode of operation of MOS transistorsand whose input is depended on bias current. The unique behaviour of the MOS transistors insubthreshold region not only allows a designer to work at low input bias current but also at low voltage.While operating the device at weak inversion results low power dissipation but dynamic range isdegraded. Optimum balance between power dissipation and dynamic range results when the MOStransistors are operated at moderate inversion. Power is again minimised by the application of inputdependant bias current using feedback loops in the input transistors of the differential pair with twocurrent substractors. In comparison with the reported low power low voltage opamps at 0.8 umtechnology, this opamp has very low standby power consumption with a high driving capability andoperates at low voltage. The opamp is fairly small (0.0084 mm 2 ) and slew rate is more than other lowpower low voltage opamps reported at 0.8 um technology [1,2]. Vittoz at al [3] reported that slew ratecan be improved by adaptive biasing technique and power dissipation can be reduced by operating thedevice in weak inversion. Though lower power dissipation is achieved the area required by the circuit isvery large and speed is too small. So, operating the device in moderate inversion is a good solution. Alsooperating the device in subthreshold region not only allows lower power dissipation but also a lowervoltage operation is achieved.