Synchronous Design of Enhanced Parallel Port
EPP并行通信接口同步设计

Due to the facts that it is more difficult to control the timing of asynchronous devices and less support from EDA tools compared with synchronous device, presents a design of synchronous Enhanced Parallel Port(EPP) based on FSM, which makes the timing of EPP more clear and controllable, and the circuits more stable and reliable.The method can also be applied to designing synchronous PS/2, Extended Capabilities Port(ECP), etc.