Design of Low Voltage Low Power Current-Mode CMOS Circuits Based on Parallel Switches
基于并联开关的低电压低功耗电流型CMOS电路设计

A novel current-mode CMOS parallel structure is proposed. This parallel switch structure allows current-mode CMOS circuits to perform under lower source voltage which makes low power consuming possible. Beside, the current-mode circuits based on the proposed parallel structure have smaller propagation delay time than its counterpart which use cascade switches under the same source voltage. PSPICE simulation proves that circuits designed with the proposed structure can perform under low source voltage while holding short propagation delay time.