%0 Journal Article
%T Design of Low Voltage Low Power Current-Mode CMOS Circuits Based on Parallel Switches<br>基于并联开关的低电压低功耗电流型CMOS电路设计
%A Shen Ji-zhong
%A Shao Zhi-long
%A Jiang Zheng-ke
%A <br>沈继忠
%A 邵志龙
%A 蒋征科
%J 电子与信息学报
%D 2004
%I 
%X A novel current-mode CMOS parallel structure is proposed. This parallel switch structure allows current-mode CMOS circuits to perform under lower source voltage which makes low power consuming possible. Beside, the current-mode circuits based on the proposed parallel structure have smaller propagation delay time than its counterpart which use cascade switches under the same source voltage. PSPICE simulation proves that circuits designed with the proposed structure can perform under low source voltage while holding short propagation delay time.
%K Current-mode CMOS circuits
%K Threshold operation
%K Parallel switches
%K Multivalued logic<br>电流型CMOS电路
%K 阈运算
%K 并联开关
%K 多值逻辑
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=65CF336F5F6A5CA9&yid=D0E58B75BFD8E51C&vid=96C778EE049EE47D&iid=5D311CA918CA9A03&sid=E84660E787B699A9&eid=09002DF587B7129E&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=0&reference_num=9