A Hardware-Software Co-verification Method for SOC Design
片上系统设计中软硬件协同验证方法的研究

This paper presents a hardware-software co-verification method for SOC design, which is based on instruction set simulator and hardware simulator, and used to validate function of SOC in the early design phase. The generating and processing methods of interactive events between hardware and software simulator during co-simulation are discussed in detail. An algorithm of synchronizing between hardware and software simulator is presented, and to reduce the synchronization overhead, some optimizing methods are introduced. Finally, an co-verification example of a design based on ARM7TDMI is given.