%0 Journal Article
%T A Hardware-Software Co-verification Method for SOC Design<br>片上系统设计中软硬件协同验证方法的研究
%A Yan Ying-jian
%A Liu Ming-ye
%A <br>严迎建
%A 刘明业
%J 电子与信息学报
%D 2005
%I 
%X This paper presents a hardware-software co-verification method for SOC design, which is based on instruction set simulator and hardware simulator, and used to validate function of SOC in the early design phase. The generating and processing methods of interactive events between hardware and software simulator during co-simulation are discussed in detail. An algorithm of synchronizing between hardware and software simulator is presented, and to reduce the synchronization overhead, some optimizing methods are introduced. Finally, an co-verification example of a design based on ARM7TDMI is given.
%K System-on- chip
%K Co-verification
%K Co-simulation
%K Instruction set simulator<br>片上系统
%K 协同验证
%K 协同模拟
%K 指令集模拟器
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=14D8A8CC4EDF0BA0&yid=2DD7160C83D0ACED&vid=DB817633AA4F79B9&iid=0B39A22176CE99FB&sid=E3094127AA4ABC1A&eid=4AD4BA66429F5627&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=4&reference_num=6