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电子与信息学报 2005
Low Power Clock-Gating Method and Its Applications in SAR Real-Time Processor
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Abstract:
Power consumption has to be taken into consideration in an applied SAR real-time processor. The power consumption is measured before and after clock-gating method had been applied to DSP, SBSRAM and FPGA of an air-borne SAR real-time preprocessor board respectively by software. It has been proved that clock-gating method is feasible for low power design in the SAR especially the future space-borne SAR real-time processor.