%0 Journal Article
%T Low Power Clock-Gating Method and Its Applications in SAR Real-Time Processor<br>低功耗Clock-Gating技术在SAR实时成像处理中的应用
%A Chen Bing-bing
%A Shao Jie
%A Wang Zhen-song
%A Zhao Rong-cai
%A <br>陈冰冰
%A 邵洁
%A 王贞松
%A 赵荣彩
%J 电子与信息学报
%D 2005
%I 
%X Power consumption has to be taken into consideration in an applied SAR real-time processor. The power consumption is measured before and after clock-gating method had been applied to DSP, SBSRAM and FPGA of an air-borne SAR real-time preprocessor board respectively by software. It has been proved that clock-gating method is feasible for low power design in the SAR especially the future space-borne SAR real-time processor.
%K SAR real-time processor
%K Low power dissipation
%K Clock-gating method<br>SAR实时成像处理
%K 低功耗
%K Clock-gating技术
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=D9228FBB602A7C4B&yid=2DD7160C83D0ACED&vid=DB817633AA4F79B9&iid=38B194292C032A66&sid=78BF76CF5B7CB0F2&eid=FB36B1C076A263FA&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=0&reference_num=7