THE LOGIC SYNTHESIS OF MULTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL-ADDER
多值对称函数基于二值全加器的电路实现

This paper discusses the definition and properties of multivalued symmetric functions, and points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj corresponding to j will certainly be a symmetric function, and it may be expressed as the sum-of-products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the logic synthesis circuit realization for the multivalued symmetric functions based upon full-adders is proposed.