Simulation and Experiment on a Buried-Oxide Trench-Gate Bipolar-Mode JFET
埋氧沟槽栅双极模式JFET的仿真与实验

A buried-oxide trench-gate bipolar-mode JFET (BTB-JFET) with an oxide layer buried under the gate region to reduce the gate-drain capacitance Cgd is proposed.Simulations with a resistive load circuit for power loss comparison at high frequency application are performed with 20V-rated power switching devices,including a BTB-JFET,a trench MOSFET (T-MOSFET) generally applied in present industry,and a conventional trench-gate bipolar-mode JFET (TB-JFET) without buried oxide,for the first time.The simulation results indicate that the switching power loss of the normally-on BTB-JFET is improved by 37% and 14% at 1MHz compared to the T-MOSFET and the normally-on TB-JFET,respectively.In order to demonstrate the validity of the simulation,the normally-on TB-JFET and BTB-JFET have been fabricated successfully for the first time,where the buried oxide structure is realized by thermal oxidation.The experimental results show that the Cgd of the BTB-JFET is decreased by 45% from that of the TB-JFET at zero source-drain bias.Compared to the TB-JFET,the switching time and switching power loss of the BTB-JFET decrease approximately by 7.4% and 11% at 1MHz,respectively.Therefore,the normally-on BTB-JFET could be pointing to a new direction for the R&D of low voltage and high frequency switching devices.