A high performance 90 nm CMOS SAR ADC with hybrid architecture
基于混合结构的一种高性能90nm CMOS逐次逼近A/D转换器

A 10-bit 2.5 MS/s SAR A/D converter is presented.In the circuit design,an R-C hybrid architecture D/A converter,pseudo-differential comparison architecture and low power voltage level shifters are utilized.Design challenges and considerations are also discussed.In the layout design,each unit resistor is sided by dummies for good matching performance,and the capacitors are routed with a common-central symmetry method to reduce the nonlinearity error.This proposed converter is implemented based on 90 nm CMOS ...