Analysis and Simulation of Effect of Pinhole Defects on Integrated Circuits Functional Yield
针孔缺陷对集成电路功能成品率影响分析与仿真

Modelling the functional yield loss of integrated circuits caused by pinhole defects is under study on the basis of Monte- Carlo statistical m ethod and critical area algorithm,which are presented for the sim ulation of the functional yield deter- mined by pinhole defects,as is of great importance in yield- im provement design.