%0 Journal Article
%T Analysis and Simulation of Effect of Pinhole Defects on Integrated Circuits Functional Yield<br>针孔缺陷对集成电路功能成品率影响分析与仿真
%A MA Pei- jun
%A HAO Yue
%A LIU Hong- xia
%A <br>马佩军
%A 郝跃
%A 刘红侠
%J 半导体学报
%D 2001
%I 
%X Modelling the functional yield loss of integrated circuits caused by pinhole defects is under study on the basis of Monte- Carlo statistical m ethod and critical area algorithm,which are presented for the sim ulation of the functional yield deter- mined by pinhole defects,as is of great importance in yield- im provement design.
%K IC
%K Monte- Carlo method
%K sim ulatio<br>集成电路
%K Monte-Carlo方法
%K 仿真
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=EBAFDBEAB186AD0F&yid=14E7EF987E4155E6&vid=BC12EA701C895178&iid=CA4FD0336C81A37A&sid=331211A5F5616413&eid=F24949CFDB502409&journal_id=1674-4926&journal_name=半导体学报&referenced_num=5&reference_num=8