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Strained-Si pMOSFETs on Very Thin Virtual SiGe Substrates

Keywords: strained-Si,virtual SiGe substrates,pMOSFET
strained-Si
,virtual,SiGe,substrates,pMOSFET

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Abstract:

Strained-Si pMOSFETs on very thin relaxed virtual SiGe substrates are presented.The 240nm relaxed virtual Si0.8Ge0.2 layer on 100nm low-temperature Si(LT-Si) is grown on Si(100) substrates by molecular beam epitaxy.LT-Si buffer layer is used to release stress of the SiGe layer so as to make it relaxed.DCXRD,AFM,and TEM measurements indicate that the strain relaxed degree of SiGe layer is 85%,RMS roughness is 1.02nm,and threading dislocation density is at most 1e7cm-2.At room temperature,a maximum hole mobility of strained-Si pMOSFET is 140cm2/(V·s).Device performance is comparable to that of devices achieved on several microns thick relaxed virtual SiGe substrates.

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