Investigation of Photolithographing Etch Contour and Surface Passivation of High Power Transistor
大功率晶体管刻槽与钝化工艺研究

In this paper,a new method of photolithographing Etch contour and kapton surface pas-sivation of high power transistor is presented.The new method, termed the deplation etch me-thod,is capable of giving virtually ideal breakdown voltage for planr type transistor and usesonly a action of the area required for a typical negative bevel.The actual breakdown voltagedepends on how carefully the etch is controlled. Experimental results shows that this method improved junction breakdown properties, de-cresed small-currend common-emitter gain H_(FE) fall and surface leakage current and improv-ed junction high temperature praperties.