%0 Journal Article
%T Investigation of Photolithographing Etch Contour and Surface Passivation of High Power Transistor<br>大功率晶体管刻槽与钝化工艺研究
%A Wan Jiqing/Hunan University
%A ChangshaLiao Xiaohua/Hengyang Transistor Factory
%A <br>万积庆
%A 廖晓华
%J 半导体学报
%D 1989
%I 
%X In this paper,a new method of photolithographing Etch contour and kapton surface pas-sivation of high power transistor is presented.The new method, termed the deplation etch me-thod,is capable of giving virtually ideal breakdown voltage for planr type transistor and usesonly a action of the area required for a typical negative bevel.The actual breakdown voltagedepends on how carefully the etch is controlled. Experimental results shows that this method improved junction breakdown properties, de-cresed small-currend common-emitter gain H_(FE) fall and surface leakage current and improv-ed junction high temperature praperties.
%K Transistor Etch Depletion
%K Techniqve Passivation
%K Photolithograph<br>晶体管
%K 大功率
%K 刻蚀
%K 耗尽层
%K 钝化
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=E14F61C05B2E2F7F&yid=1833A6AA51F779C1&vid=F3090AE9B60B7ED1&iid=F3090AE9B60B7ED1&sid=FA519F4FF622280A&eid=5E191A234CD3698F&journal_id=1674-4926&journal_name=半导体学报&referenced_num=1&reference_num=2