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半导体学报 2002
An Effectual IC''''s Yield Estimation Model
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Abstract:
The new computational model of the chip fault probability and IC's yield is given based on the mechanism of a chip with a defect that causes fault.The yield parameters are extracted by a realizable system of IC functional yield simulator,XD YES,for a practical circuit XT 1 and those parameters are used to compute yield of XT 1 by this new model.The result computed is in agreement with the result tested.
