An Implementation of FIR Filter by FPGA Used onSAR Preprocessing Filter
基于FPGA的SAR预处理器中FIR滤波器的实现

In the real-time processing system of Synthetic Aperture Radar, the preprocessor play a veryimportant role and the main component of the preprocessor is FIR filter. As for the requirements of theSynthetic Aperture Radar' s preprocessing filter, this paper proposes a method of FPGA based FIR filterdesign by linear FIR digital filter window function and accomplished a 16-tap 8-bit FIR filter by usingXCV100E FPGA devices. As for the key technical problem—the multipliers, we give the DistributedArithmetic which converts the multiplications into some look-up operations. This arithmetic uses the LUTresources in the FPGA fully and can improve the system' s speed and system' s reliability. The designmethod is very useful for the accomplishment of real-time processor of SAR and will benefit the space-borne Synthetic Aperture Radar real-time processing system. The results of simulation on the hardwarecircuit prove this method is efficient and can meet the design requirements very well.