%0 Journal Article
%T An Implementation of FIR Filter by FPGA Used onSAR Preprocessing Filter<br>基于FPGA的SAR预处理器中FIR滤波器的实现
%A XU Feng
%A YU Wei-dong
%A TANG Hong
%A XIE Dong-dong
%A <br>徐　锋
%A 禹卫东
%A 唐红
%A 谢东东
%J 遥感技术与应用
%D 2004
%I 
%X In the real-time processing system of Synthetic Aperture Radar, the preprocessor play a veryimportant role and the main component of the preprocessor is FIR filter. As for the requirements of theSynthetic Aperture Radar' s preprocessing filter, this paper proposes a method of FPGA based FIR filterdesign by linear FIR digital filter window function and accomplished a 16-tap 8-bit FIR filter by usingXCV100E FPGA devices. As for the key technical problem—the multipliers, we give the DistributedArithmetic which converts the multiplications into some look-up operations. This arithmetic uses the LUTresources in the FPGA fully and can improve the system' s speed and system' s reliability. The designmethod is very useful for the accomplishment of real-time processor of SAR and will benefit the space-borne Synthetic Aperture Radar real-time processing system. The results of simulation on the hardwarecircuit prove this method is efficient and can meet the design requirements very well.
%K SARzz
%K FIR filterzz
%K FPGAzz
%K Window functionzz
%K Preprocessing filterzz<br>SAR
%K FIR滤波器
%K FPGA
%K 窗函数
%K 分布式算法
%K 预处理器
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=6F56B81324C1B239DA82AE08A4344F0C&aid=8207906E12F691D65662ED2686156471&yid=D0E58B75BFD8E51C&vid=2A8D03AD8076A2E3&iid=38B194292C032A66&sid=4FE459D71E3BF8EB&eid=B7BFA4B351E4C682&journal_id=1004-0323&journal_name=遥感技术与应用&referenced_num=0&reference_num=0