Characteristics and optimization of 4H-SiC MESFET with a novel p-type spacer layer incorporated with a field-plate structure based on improved trap models
基于改进陷阱模型的新型p型隔离层结合场板结构的4H-SiC MESFET的特性研究与优化

A novel structure of 4H-SiC MESFETs is proposed which focuses on surface trap suppression. Investigation has been made on the characteristics based on physical models for material properties and improved trap models which are proven to have good agreements with experimental data. Compared with characteristics of former fabrication utilized structure with corresponding measured data, proposed structure is shown to improve device properties in comprehensive aspects. A p-type spacer layer introduced in proposed structure is shown to suppress surface trap effect and reduce gate-drain capacitance under large drain voltage in microwave operation. P-type spacer layer incorporated with a field-plate improves the electric field distribution on the gate edge while spacer layer induces less gate-drain capacitance than the well recognized buried gate incorporated with field-plate (BG-FP) structure. For microwave applications, 4H-SiC MESFET for proposed structure has larger gate-lag ratio in saturation region due to better surface trap isolation from conductive channel. For high power applications, proposed structure allows higher operating voltage as well. The maximum saturation current density of 460mA/mm is yielded. Also, the gate-lag ratio under drain voltage of 20V is close to 90%. In addition, a 5% and a 17.8% improvement in fT and fmax are obtained compared with BG-FP MESFET in AC simulation, respectively. Parameters and dimensions of proposed structure are optimized to make the best of device for microwave applications and provide reference for device design.