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A Modified Carrier-Based PWM Technique for Cascaded H-Bridge Inverters: Enhanced Harmonic Reduction and DC Bus Utilization  [PDF]
Syafirul Imran Shaharuddin, Fazlli Patkar, Jurifa Mat Lazi, Md Hairul Nizam Talib, Azrita Alias, Nurul Ain Said, Zainuddin Mat Isa
Journal of Power and Energy Engineering (JPEE) , 2025, DOI: 10.4236/jpee.2025.139011
Abstract: Multilevel inverters are a crucial component in renewable energy systems, motor drives, and grid system due to their capability to generate high-quality AC output power. Among various multilevel inverter topologies, Cascaded H-Bridge Multilevel Inverter (CHB-MLI) is known for its scalability and modularity. However, the main concern in CHB-MLI is the Total Harmonic Distortion (THD) caused by the switching algorithm that is not optimized, which can cause harm to the systems due to low power quality and efficiency. This paper addresses the issue of THD in CHB-MLI by proposing a modified Carrier-Based Pulse Width Modulation (CB-PWM) technique, namely the Third Harmonic Injection Square Pulse Width Modulation (THI2-PWM). The proposed method also aims to improve DC bus utilization. To validate the effectiveness of the THI2-PWM technique, simulations were carried out using MATLAB Simulink for a 5-level CHB-MLI system. The results demonstrate improved performance compared to conventional CB-PWM methods.
Experimental Analysis of Seven-Level Cascaded VSI with SVPWM Algorithm Utilizing FPGA for Photovoltaic System  [PDF]
M. Valan Rajkumar, B. Ambika
Circuits and Systems (CS) , 2026, DOI: 10.4236/cs.2026.173003
Abstract: This paper presents field programmable gate array (FPGA) implementation of space vector pulse width modulation (SVPWM) algorithm for a three-phase seven-level cascaded H-bridge multilevel inverter (CHMLI) for photovoltaic (PV) systems. The maximum power point tracking (MPPT) algorithm is solved by fuzzy logic controller. SVPWM algorithm uses a simple mapping to generate gate signals for the inverter. A digital design of SVPWM generator using hardware description language (VHDL) is proposed and implemented on FPGA. This is done to achieve high dynamic performance with low total harmonic distortion (THD). The results of proposed seven-level cascaded voltage source inverter (VSI) are compared with the five-level inverter in terms of THD. The simulated results are also validated through suitable experiments.
THD Analysis of Cascaded H-Bridge Inverter with Fuzzy Logic Controller  [PDF]
Sivakumar N., Sumathi A.
Circuits and Systems (CS) , 2017, DOI: 10.4236/cs.2017.87011
Abstract:
In recent days, the multilevel inverter technology is widely applied to domestic and industrial applications for medium voltage conversion. But, the power quality issues of the multilevel inverter limit the usage of much sensitive equipment like medical instruments. The lower distortion level of the output voltage and current can generate a quality sinusoidal output voltage in inverters and they can be used for many applications. The harmonics can cause major problems in equipments due to the nonlinear loads connected with the power system. So, it is necessary to minimize the losses to raise its overall efficiency. In this paper, a new topology of seven level asymmetrical cascaded H-bridge multilevel inverter with a Fuzzy logic controller had been implemented to reduce the Total Harmonic Distortion (THD) and to improve the overall performance of the inverter. The proposed model is well suited for use with a solar PV application. In this topology, only six IGBT switches are used with three different voltage ratings of PV modules (1:2:4). The lower number of semiconductor switches leads to minimizing overall di/dt ratings and voltage stress on each switches and switching losses. The gate pulses generated by Sinusoidal Pulse Width Modulation (SPWM) technique with a Fuzzy logic controller are also introduced. A buck-boost converter is used to maintain the constant PV voltage level integrated by an MPPT technique followed by Perturb and Observer algorithm is also implemented. The MPPT is used to harness the maximum power of solar radiations under its various climatic conditions. The new topology is evaluated by a Matlab/Simulink model and compared with a hardware model. The results proved that the THD achieved by this topology is 1.66% and realized that it meets the IEEE harmonic standards.
Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications  [PDF]
M. S. Saravanan, R. Jeyabharath
Circuits and Systems (CS) , 2016, DOI: 10.4236/cs.2016.710282
Abstract: This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.
Comparative Study of Sinusoidal PWM Strategies in Cascaded Multilevel Inverters  [PDF]
Muhammad Syazreen Samsudin, Azrita Alias, Nurul Ain Mohd Said, Fazlli Patkar, Jurifa Mat Lazi, Md Hairul Nizam Bin Talib, Muhammad Zaid Aihsan
Journal of Power and Energy Engineering (JPEE) , 2025, DOI: 10.4236/jpee.2025.139007
Abstract: This paper presents a comparative study of four Sinusoidal Pulse Width Modulation (SPWM) strategies Phase Disposition (PD-PWM), Phase Opposition Disposition (POD-PWM), Alternate Phase Opposition Disposition (APOD-PWM), and a Modified SPWM applied to Cascaded H-Bridge Multilevel Inverter (CHMI) systems. MATLAB/Simulink is used to simulate both 5-level and 11-level CHMI configurations, focusing on output voltage quality and total harmonic distortion (THD) as performance metrics. The analysis is conducted by varying two key control parameters: modulation index (0.5 to 1.0) and switching frequency (5 kHz, 10 kHz, 20 kHz). The results show that increasing voltage levels is the most effective way to improve waveform quality, while modulation strategy plays a minor role. POD and APOD offer slight THD advantages, and Modified SPWM performs almost identically to PD-PWM, making it a simpler alternative for practical CHMI applications. The findings provide a practical guideline for selecting appropriate SPWM strategies in high-performance inverter applications such as electric vehicles, industrial drives, and renewable energy systems.
Minimization of Switching Devices and Driver Circuits in Multilevel Inverter  [PDF]
S. Jawahar, P. Ramamoorthy
Circuits and Systems (CS) , 2016, DOI: 10.4236/cs.2016.710287
Abstract: The various configurations of multilevel inverter involve the use of more numbers of switching devices, energy storage devices and/or unidirectional devices. Each switching unit necessitates the add-on driver circuit for proper functionality. Cascaded H-Bridge Multilevel Inverter requires overlapped switching pulses for the switching devices in positive and negative arms of the bridge which may lead to short circuit during the device failure. This work addresses the problems in different configurations of multilevel inverter by using reduced number of switching and energy storage devices and driver circuits. In the present approach Single Switch is used for each stair case positive output and single H-Bridge for phase reversal. Driver circuits are reduced by using the property of body diode of the MOSFET. Switching pulses are generated by Arduino Development Board. The circuit is simulated using Matlab. More so, through experimental means, it is physically tested and results are analyzed for the 5-step inverter and thereby simulation is fully validated. Consequently, cycloconverter operation of the circuit is simulated using Matlab. Moreover, half bridge configuration of the multilevel inverter is also analyzed for high frequency induction heating applications.
MODELING AND SIMULATION OF A NOVEL SERIES/PARALLEL VOLTAGE SOURCES MULTILEVEL INVERTER
N.SANTHOSH SINGH.B,,DR.B.BRAHMAIAH
International Journal of Engineering Science and Technology , 2011,
Abstract: In this paper, a new topology of cascaded multilevel inverter with a high number of steps associated with a low number of switches is presented. A multilevel voltage is obtained by cascading two H-bridges and an inverter. Voltage sources are connected in series/parallel by the switching devices. The size, complexity and power consumption in the gate driving circuits is also reduced. Reduction of rating of the switches is another advantage. The total harmonic distortion (THD) is reduced with more number of steps in output voltage without using pulse width modulation techniques. The proposed setup configures theoretical approach along with simulations carried on MATLAB/SIMULINK environment. Simulation results are shown and compared with theoretical results.
NINE-LEVEL INVERTER SYSTEM FOR AN OPEN-END WINDING
U. Ramesh Babu,,N.Narasimhulu
International Journal of Engineering Science and Technology , 2011,
Abstract: A Nine level inverter system for an open-end winding induction motor drive is presented in this paper. 9 level inversion is achieved by feeding an open-end winding induction motor with two symmetrical 3-level inverters from both ends. The combined inverter system with open-end winding induction motor produces voltage space phasor locations identical to a 9-level inverter. A total of 4096 space phasor combinations are available in the proposed scheme, distributed over 217 space vector locations. The proposed inverter drive scheme is capable of producing the phase voltage ranging from 2-level to 9-level depending on the depth of modulation. The inverter with the higher DC-link voltage is switching less frequently, compared to the inverter with the lower DC-link voltage.
基于灰狼算法优化支持向量机的级联H桥五电平逆变器故障诊断
Fault Diagnosis of Cascaded H-Bridge Five-Level Inverter Based on Support Vector Machine Optimized by Grey Wolf Algorithm  [PDF]
杜垚
Modeling and Simulation (MOS) , 2024, DOI: 10.12677/mos.2024.136543
Abstract: 级联H桥多电平逆变器因其高效的能量转换和良好的输出谐波性能广泛应用于工业领域。逆变器开路故障会显著影响系统输出性能，故障定位的快速准确与否至关重要。本文以级联H桥五电平逆变器为研究对象，提出一种基于灰狼算法(Grey Wolf Optimizer, GWO)优化支持向量机(Support Vector Machines, SVM)的故障诊断方法。首先，利用小波包分解提取逆变器输出电压的能量熵作为特征向量，并通过概率主成分分析(Probabilistic Principal Component Analysis, PPCA)进行降维。接着，采用GWO算法对SVM中的关键参数进行优化，提升故障诊断效果。实验结果表明，所提方法在不同开路故障下均表现出优越的诊断准确率和较快的收敛速度，验证了其在复杂工况下的有效性和可行性。
Cascaded H-bridge multilevel inverters are widely used in industrial applications due to their efficient energy conversion and excellent harmonic performance. Open-circuit faults in inverters can significantly degrade system output, making fast and accurate fault localization critical. This paper focuses on the cascaded H-bridge five-level inverter and proposes a fault diagnosis method based on Support Vector Machines (SVM) optimized by the Grey Wolf Optimizer (GWO). First, the energy entropy of the inverter output voltage is extracted as a feature vector using wavelet packet decomposition, followed by dimensionality reduction through Probabilistic Principal Component Analysis (PPCA). Subsequently, the GWO algorithm is employed to optimize the key parameters of the SVM, improving fault diagnosis performance. Experimental results demonstrate that the proposed method achieves superior diagnostic accuracy and faster convergence across various open-circuit fault conditions, confirming its effectiveness and feasibility in complex operating environments.
级联H桥变流器电容电压均衡约束条件
刘秋降,吴丽然,吴命利
- , 2016,
Abstract: 通过建立级联H桥变流器数学模型,分析了引起电容电压不均衡原因,建立了调制波微调量叠加法的微分方程与传递函数,求出了均压控制下电容电压稳态解析解。针对多模块下调节器参数整定问题,分析确定了调制波微调量叠加法可靠工作的相角约束和比例系数约束条件。进而指出了变流器在感性、容性工作状态之间切换时电容均压控制稳定工作条件。利用PSCAD/EMTDC软件搭建了三相三级联变流器模型,通过仿真验证了所提出的约束条件的有效性
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