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Design of NAND Flash Controller Based on NB-LDPC ECC

DOI: 10.4236/oalib.preprints.1200293, PP. 1-26

Subject Areas: Simulation/Analytical Evaluation of Communication Systems, Information and communication theory and algorithms, Communication Protocols

Keywords: NAND-Flash, NB-LDPC, Integrated Circuit, Communication Verification

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Abstract

NAND flash, as the mainstream storage medium, has the advantages of high performance, high density, non-volatile and low power consumption. However, due to the special internal structure of NAND flash, it is necessary to design a special controller for data management, which is suitable for all kinds of storage systems. In this paper, a NAND flash controller based on NB-LDPC is completed. We will describe the construction of LDPC code, the implementation of encoding circuit, the realization of decoding circuit and the connection with interface. We run simulations and simulations through C , Verilog, and Maltab. Part of the performance of the module is tested. The size of LDPC check matrix is 9210*1017 and the code rate is 0.89. The encoding and decoding circuits of the controller are all implemented and have ECC function.

Cite this paper

Liu, T. , Yu, H. , Zhang, G. , Li, Y. , Zhou, M. , Zhang, Z. , Xin, X. , Liu, S. and Ren, J. (2021). Design of NAND Flash Controller Based on NB-LDPC ECC. Open Access Library PrePrints, 5, e293. doi: http://dx.doi.org/10.4236/oalib.preprints.1200293.

References

[1]  刘卫. NAND Flash控制器的设计与验证[D]. 国防科学技术大学.
[2]  彭立, 朱光喜. 基于校验和的LDPC码硬判决解码算法的研究[J]. 移动通信, 2004, 028(0z1):12-15.
[3]  彭立, 朱光喜. 基于可靠性的LDPC码软判决解码算法的研究[J]. 信息技术, 2004, 000(006):48-50.

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