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A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters

Keywords: winner-take-all, neural networks, analog circuits.

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in this paper, a low-complexity current-mode winner-take-all circuit (wta) of o (n) complexity with logical outputs is presented. the proposed approach employs a quasi-fg inverter as the key element for current integration and the computing of the winning cell. the design was implemented in a double-poly, three metal layers, 0.5μm cmos technology. the circuit exhibits a good accuracy-speed tradeoff when compared to other reported wta architectures.


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