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Applied Physics 2026
SnSe/SnSe2异质结的界面结构
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Abstract:
半导体异质结是现代半导体器件中极其重要的功能结构单元，其界面处的能带不连续可为器件设计提供丰富的“能带工程”。本文采用温度梯度熔融结晶法制备范德华半导体SnSe/SnSe2异质结，使用透射电镜技术深入研究了不同降温速率下SnSe/SnSe2异质结的界面结构，发现慢冷制备的(冷却速率低于0.1℃/min) SnSe/SnSe2异质结两侧晶体具有固定排列和取向的结构[011]SnSe//[100]SnSe2、(100)SnSe//(001)SnSe2。而较快冷却速度(>1.0℃/min)下SnSe和SnSe2范德华原子晶面取向不固定，且相界面附近SnSe2晶体内出现大量随机分布的堆垛层错，研究表明其源自于界面处的晶格失配与热应力。本实验为可控制备和调控大面积SnSe/SnSe2异质结结构提供指导。
Semiconductor heterojunctions represent an exceptionally important functional structural unit in modern semiconductor devices, where the energy band discontinuity at the interface provides abundant “band engineering” opportunities for device design. In this work, van der Waals semiconductor SnSe/SnSe2 heterojunctions were fabricated using a temperature-gradient melt crystallization method. The interfacial structures of SnSe/SnSe2 heterojunctions prepared under different cooling rates were systematically investigated by transmission electron microscopy. It was found that the crystals on both sides of the SnSe/SnSe2 heterojunction prepared with a slow cooling rate (below 0.1？C/min) exhibit a fixed crystallographic orientation relationship: [011]SnSe//[100]SnSe2 and (100)SnSe//(001)SnSe2. In contrast, for a relatively fast cooling rate (greater than 1.0？C/min), the orientations of the van der Waals atomic planes of SnSe and SnSe2 are not fixed, and a large number of randomly distributed stacking faults appear in the SnSe2 crystal near the phase interface. These stacking faults are attributed to lattice mismatch and thermal stress at the interface. This work provides guidance for the controllable fabrication and structural tuning of large-area SnSe/SnSe2 heterojunctions.
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