An Ultra-Low Power 28 nm FD-SOI Low Noise Amplifier Based on Channel Aware Receiver System Analysis

Abstract This study investigates the benefit of an optimal and energy-efficient reconfiguration technique for the design of channel-aware receiver aiming Internet of Things (IoT) applications. First, it demonstrates the interest for adaptive receivers based on an estimation of the received power and compares the proposed channel-aware receiver with the State Of the Art. It is shown that the lifetime of the Wireless Sensor (WS) battery can be extended by a factor of five with the optimization of operating points of the tunable receiver while maintaining similar performances than industrial modules. The design of an Ultra-Low Power (ULP) inductorless Low Noise Amplifier (LNA), which fits the low power mode of the tunable receiver, is then optimized and described. The back-gate biasing of Fully Depleted Silicon-On-Insulator (FD-SOI) technology to lower the power consumption by more than 25% still maintaining performances is evaluated. The proposed LNA has been implemented in ST-Microelectronics 28 nm FD-SOI Technology, its active area is only 0.0015 mm 2. The measured performances at 2.4 GHz exhibit more than 16 dB of voltage Gain (Gv), 7.3 dB of Noise Figure (NF), and a ？16 dBm Input referred third-order Intercept Point (IIP3). The LNA consumes 300 μW from a 0.6 V supply. View Full-Tex