This algorithm integrates second level Built in self-test (BIST) into multiple memory grouping wrapper. Second level BIST brings additional reliability into memory system while fastening testing time. Main approach is to test whole memory modules from top level by numerous step count of which can be modified based on power consumption requirement and overheat conditions. The worst case of the algorithm can be observed by the time when number of steps is equal to the number of memory modules, otherwise the testing time will be relative to 1/N (N is the number of steps). The main advantages of memory wrapping methodology is possibility of increasing variety of the number of bits and number of cells in the memory, while using limited memories provided by foundry.
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https://doi.org/10.36478/jeasci.2019.2695.2700
