126.6~128.1 GHz基波压控振荡器设计

采用65 nm CMOS工艺，设计一款基波压控振荡器（VCO）.采用负阻单元的寄生电容与用户自定义电感形成VCO的电感-电容（LC）谐振网络.采用交叉耦合对管作为VCO的负阻单元，维持VCO的稳定输出信号.通过控制尾电流管的偏置电压大小调节交叉耦合管的寄生电容，从而实现输出频率的调谐.VCO输出缓冲器（buffer）采用共源-共栅（Cascode）结构以减小负载电阻对电路振荡的影响.所设计的片上变压器实现了差分信号转单端信号功能，并与传输线、地-信号-地（GSG）焊盘实现了VCO输出匹配.测试结果表明，电路的输出频率范围为126.6~128.1 GHz，调谐范围为1.5 GHz.当电路工作频率为127.2 GHz时，输出功率为-26.8 dBm，偏频为1 MHz处相位噪声的仿真值为-86.3 dBc/Hz.该电路的芯片面积为405 μm×440 μm.
Abstract: A fundamental voltage control oscillator (VCO) was designed by 65 nm CMOS process. The parasitic capacitor of negative impedance cell and consumer-designed inductor constitute the LC tank of the proposed VCO. The cross-couple MOSFETs were designed as the negative impedance cell to sustain the steady output signal of VCO. The frequency of the output signal was tuned by changing the bias voltage which was added at the rail current MOSFET of the cross-couple MOSFETs. The cascode amplifier was employed as the buffer of VCO to alleviate the effect of load resistance. In addition, the on-chip transformer with the structure of floating metal bar was designed to realize the transformation between the differential signal and single-ended signal. The transformer, the consumer-designed transmission-line and the designed GSG PAD realize the matching of the VCO output. The measure results show that the output frequency of this VCO ranges from 126.6 GHz to 128.1 GHz, the tune range is 1.5 GHz, and the output power is -26.8 dBm at the frequency of 127.2 GHz. The post-simulation shows that the phase noise at 1 MHz offset from 127.2 GHz is -86.3 dBc/Hz. The area of this VCO is 405×440 μm2.