过电平采样模数转换器误差源的建模

摘要 过电平模数转换器采用异步采样的方式进行数据转换.主要对转换器的不同时间模式进行了研究，综合分析了误差源对异步采样ADC性能的影响，特别对有限时间分辨率、有限精度量化两种主要误差源进行了详细分析.通过优化设计，将计算采样时刻的最大量化误差降为计数器时钟周期的一半，有效提高了系统的信噪比(SNR).推导出SNR的方程，对于固定的时钟频率，当量化分辨率较大时，SNR达到62dB左右.通过仿真确认了方程的正确性.
Abstract：Level crossing analog-to-digital converter adopts asynchronous sampling method for data conversion. Different timing schemes in asynchronous sampling ADC were studied， and the effect of main error sources on the asynchronous sampling ADC performance was analyzed， especially for the limited resolution of the timer and the limited accuracy of the quantization levels. By optimizing the design， the maximum quantization error of the sampling time was reduced to half of the clock cycle， based on which the system SNR could be effectively improved. The equation of SNR was presented，and when the quantization resolution was large enough， SNR could be about 62dB for the fixed clock frequency. The correctness of the equation was confirmed by simulation.