采用S-Tag的M-DSP片上存储DMA访问优化

针对自主设计的M-DSP，提出并设计实现了一种基于Tag副本(S-Tag)的片上SRAM DMA访问数据相关性维护机制，该机制以流水化方式实现，在基本对CPU无打扰的前提下，有效支撑了DMA数据的无阻塞传递。仿真和芯片实测结果表明，该机制硬件开销较小，并在有效带宽和带宽利用率上均优于已有典型同类芯片。
The S-Tag (Shadow Tag) mechanism of SRAM(static random access memory) data consistency maintaining for DMA(direct memory access) accessing was proposed for the independent design of M DSP(multi-core digital signal processor). The pipelining implementation can efficiently support DMA non blocking data transfer, and release the CPU. Experimental results and tests in real chips show that the proposed mechanism outperforms the state-of-art ones with respect to bandwidth and bandwidth utilization while keeping relatively lower hardware cost.