M J Wirthlin,B L Hutchings.Dynamic instruction set computer.Proceedings of the IEEE Symposium on FPGA''s for Custom Computing Machines.Napa Valley,CA,USA:IEEE Computer Society,1995.99-107.
[4]
Z Li,K Compton,S Hauck.Configuration cache management techniques for reconfigurable computing.Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines.Washington,DC,USA:IEEE Computer Society,2000.22-36.
[5]
Q Yang,J-P Soininen,et al.A configuration locking technique to reduce the configuration overhead of run-time reconfigurable devices.Proceedings of the International Symposium on System-on-Chip.Tampere,Finland,2007.1-5.
[6]
X Tang,M Aalsma,R Jou.Compiler directed approach to hiding configuration latency in Chameleon processors.Proceedings of the Roadmap to Reconfigurable Computing,10th International Workshop on Field-Programmable Logic and Applications.London,UK:Springer-Verlag,2000.29-38.
[7]
D Jimenez,C Lin.Neural methods for dynamic branch prediction [J].ACM Transactions on Computer Systems,2002,20(4):369-397.
[8]
C-SKY High Performance Embedded Processor.http://www.c-sky.com,2008.
[9]
A Lodi,M Toma,et al.A VLIW processor with reconfigurable instruction set for embedded applications [J].IEEE Journal of Solid-State Circuits,2003,38(11):1876-1886.
[10]
A Dandalis,V K Prasanna.Configuration compression for FPGA-based embedded systems [J].IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2005,13(12):1394-1398.
[11]
U Malik,O Diessel.On the placement and granularity of FPGA configuration.Proceedings of the IEEE International Conference on Field-Programmable Technology.Brisbane,Australia:IEEE Electron Devices Society,2004.161-168.
[12]
J Resano,D Mozos,et al.A hybrid prefetch scheduling heuristic to minimize at run-time the reconfiguration overhead of dynamically reconfigurable hardware.Proceedings of the Conference on Design,Automation and Test in Europe.Washington,DC,USA:IEEE Computer Society,2006.106-111.
[13]
J RResano,et al.Efficiently scheduling runtime reconfigurations [J].ACM Transactions on Design Automation of Electronic Systems,2008,13(4):58-65.
[14]
B B Wu,et al.Run-time configuration prefetching to reduce the overhead of dynamically reconfiguration.IEEE International SoC Conference.Las Vegas,NV,USA:IEEE Press,2010.305-308.
[15]
Z Li,S Hauch.Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation.ACM/SIGDA International Symposium on Field Programmable Gate Arrays.Monterey,CA,United states:Association for Computing Machinery,2002.187-195.
