J W Bandler, Chen S H.Circuit optimization:the state of the art[J].IEEE Trans Microwave Theory and Techniques, 1988, 36(2):424-443.
[4]
Keramat M, Kielbasa R.Worst case efficiency of Latin hypercube sampling Monte Carlo(LHSMC) yield estimator of electrical circuits[A].Circuits and Systems, IEEE International Symposium[C].Hong Kong,1997.3.1660-1663.
[5]
Stephen W Director, Gary D Hachtel.Computationally efficient yield estimation procedures based on simplicial approximatio[J].IEEE Trans on CAS, 1978,25(3):121-129.
[6]
Say Wei Foo, Yu Lin.Hybrid method of tolerance design[A].Electronics, Circuits and Systems, Proceedings of ICECS''99[C].Pafos,Cyprus, 1999.1.557-560.
[7]
M Conti, P Crippa, S Orcioni, C Turchetti.Parametric yield optimization of MOS IC''s affected by device mismatch[A].Analog Integrated Circuits and Signal Processing[C].Netherlands:Kluwer Academic Publishers,2001.29(3).181-199.
[8]
Shen Y, Chen R M M.Application of genetic algorithm for response surface modeling in optimal statistical design[A].Circuits and Systems, IEEE International Symposium[C].USA, 1995.28(3).2152-2155.
[9]
Keramat M, Kielbasa R.OPTOMEGA:an environment for analog circuit optimization[A].Circuits and Systems.IEEE International Symposium[C].USA, 1998.6.122-125.
[10]
Hershenson M delM, Boyd S P Lee T H.Optimal design of a CMOS opamp via geometric programming[J].Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on,2001,20(1):1-21.
[11]
Conti M, Orcioni S, Turchetti C.Parametric yield optimization of MOS VLSI circuits based on simulated annealing and its parallel implementation[J].Circuits, Devices and Systems, IEE Proceedings, 1994, 141(5):387-398.
International Technology Roadmap for Semiconductors 2002 update[DB/OL].tech.Rep, Semiconductor industry association.http://public.itrs.net.
[14]
Jess J.Parametric yield estimation for deep sub-micron VLSI circuits,integrated circuits and systems design[A].Proceedings.15th Symposium on[C].Porto Allegre, Brazil, 2002.(15).387-388.
[15]
Martin haugh.Variance reduction(Ⅲ):Important Sampling, Monte Carlo simulation[DB/OL].IEOR E4703,2003.http://www.columbia.edu/~mh2078/MCSspring03/notes09.pdf.
[16]
Hany L Abdel-Malek, Abdel-karim S O Hassan.A boundary gradient search technique and its application in design centering[J].IEEE Trans on CAD,1999,18(11):1654-1661.
[17]
Zurada J M, Lozowski A, Malinowski A.Yield improvement for GaAs IC manufacturing using neural network inverse modeling[A].Neural Networks, International Conference on[C].USA, 1997.2.800-805.