OALib Journal期刊
ISSN: 2333-9721
费用:99美元
|
|
|
基于门控时钟的片上网络路由单元低功耗设计
, PP. 18-21
Keywords: 门控时钟,片上网络,低功耗,路由单元
Abstract:
NoC(Network-on-Chip)已经逐渐代替片上总线互连,成为片上系统的解决方案,然而迅速增长的功耗将阻碍NoC的性能与发展.从NoC的核心部件路由单元入手,在研究了二维Mesh下片上网络路由单元的结构和门控时钟技术的基础上,对路由单元功耗最集中的输入端口采用了模块级门控时钟技术进行低功耗设计,通过利用软件判断控制门控使能信号来实现受控端口时钟的通断.在ModelSimSEPLUS6.0环境下进行路由单元功能仿真,并通过Synopsys公司的DesignCompiler工具给出综合结果,路由单元工作频率200MHz,动态功耗51.0457mW,降低了11.38%.
References
[1] | and Technology In fo rm ation, 2008, 20: 38-39. ( in Chinese)
|
[2] | [ Av inash Ka ranth Kod,i A shw ini Sarathy, Ahm ed Lour,i et a.l Adaptive inter-rou ter links for low-pow er, area-effic ient and re l-i
|
[3] | ab le Netw ork-on-Ch ip ( NoC ) arch itectures[ C ] / / ASP-DAC 2009. A thens: Ohio Univ, 2009, 1: 1-6.
|
[4] | [ 谢晓燕, 蒋林. 基于电路交换的NoC路由器设计与实现[ J]. 中国集成电路, 2008, 113: 20-25.
|
[5] | X ie X iaoyan, Jiang L in. Des ign and im plem entation o f router based on c ircuit- sw itch of NoC [ J] . China In teg ra ted C ircuit,
|
[6] | 2008, 113: 20-25. ( in Ch inese)
|
[7] | [ Av inash Kod,i Ahmed Lour,i JanetW ang. Design of Energy-E ffic ient Channel Bu ffers w ith Router Bypassing fo rN etwork-on-
|
[8] | Chips ( NoCs) [M ] . Qua lity o f E lectronic Design, 2009: 826-832.
|
[9] | [ R M u llins. The design and im plem enta tion o f a low- latency on- ch ip netw ork[ C] / / Asia and South Pacific Design Autom ation
|
[10] | Con ference ( ASP-DAC). UK: Cam bridgeUn iv, 2006.
|
[11] | [ DonnoM, Iva ld iA, B en ini L, et a .l C lock- tree Pow erOptim iza tion Based on RT IC lock-gating[ C] / / Proceed ing s of the Design
|
[12] | Autom ation Conference. Anaheim, CA, USA, 2003: 622-627.
|
[13] | [ Chang X iaotao, ZhangM ingm ing, Zhang Ge, et a.l Adaptive c lock ga ting techn ique for low pow er IP core in SoC design[ C ] / /
|
[14] | ISCAS 2007. Be ijing, 2007: 2120-2123.
|
[15] | [ 张永新, 陆生礼, 茆邦琴. 门控时钟的低功耗设计技术[ J] . 微电子学与计算机, 2004, 21( 1): 23-26.
|
[16] | Zhang Yongx in, Lu Sheng l,i M ao Bangq in. Low-pow er design w ith c lock ga ting techn iques[ J]. M icroe lectron ics and Compu-t
|
[17] | e r, 2004, 21( 1): 23-26. ( in Ch inese)
|
[18] | [ 王晓鹏, 朱劲. IP设计中低功耗技术的实现及实例应用分析[ J]. 科技信息, 2008, 20: 38-39.
|
[19] | W ang X iaopeng, Zhu Jing. Im plem en tation o f Low- pow er techniques du ring IP design and ana lysis o f app lication[ J]. Science
|
Full-Text
|
|
Contact Us
service@oalib.com QQ:3279437679 
WhatsApp +8615387084133
|
|