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基于分级存储并行运算的FFT处理器设计

Keywords: 快速傅里叶变换,分级存储,并行运算

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Abstract:

研究了一种基于分级存储并行运算的改进快速傅里叶变换(FFT)处理器算法,通过减少对RAM存储器的读写次数降低功耗,采用并行运算方法减少数据处理时间.基于该算法以及改进的基-4蝶形单元设计了一款4096点FFT处理器.该处理器采用SMIC0.18μmCMOS工艺设计实现,芯片核面积为9mm2,在slow工艺角条件下,版图后仿真最高时钟频率为192.3MHz,功耗为422mW@100MHz,最小处理时间为67.92μs.

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