Hu Guang, Ma Jianhua, Huang Benxiong. High throughput implementation of MD5 algorithm on GPU[J]. Ubiquitous Information Technologies & Applications, 2009, ICUT 09:1-5.
[2]
刘凯,车明,秦存秀.一种高吞吐量MD5算法的FPGA实现[J].微处理机,2008,29(1):188-191. Liu Kai, Che Ming, Qin Cunxiu. A high throughput FPGA implementation of MD5 algorithm[J]. Microprocessors, 2008,29(1):188-191. (in Chinese)
[3]
Helion Technology. High performance MD5 HASH core for Xilinx FPGA . (2002-06-21). URL:http://www.heliontech.com/downloads/md5_xilinx_helioncore.pdf .
[4]
J?rvinen K, Tommiska M, Skytta J. Hardware implementation analysis of the MD5 Hash algorithm //Proceedings of The 38th Annual Hawaii International Conference on System Sciences. : IEEE Press, 2005:297-306.
[5]
Wang Yuliang, Zhao Qiuxia, Jiang Liehui, et al. Ultra high throughput implementations for MD5 Hash algorithm on FPGA[J]. Lecture Notes in Computer Science, 2010,5938:433-441.