Blaabjerg F, Teodorescu R, Liserre M, et al. Overview of control and grid synchronization for distributed power generation syst ems[J]. IEEE Transactions on Industrial Electronics, 2006, 53(5): 1394-1409.
[2]
Singh B, Al-Haddad K, Chandra A. A review of active filters for power quality improvement[J]. IEEE Transactions on Industrial Electronics, 2001, 46(5): 960-971.
[3]
Chung S K. A phase tracking system for three phase utility interface inverters[J]. IEEE Transactions on Industrial Electronics. 2000, 16(3): 431-438.
[4]
Jovcic D. Phase locked loop system for FACTS[J]. IEEE Transactions on Power Systems, 2003, 18(3): 1116-1124.
Yang Yong, Ruan Yi, Ye Binying. Three-phase grid- connected inverters based on PLL and virtual grid flux[J]. Transactions of China Electrotechnical Society, 2010, 25(4): 109-114.
[7]
Shinnaka S. A robust single-phase PLL system with stable and fast tracking[J]. IEEE Transactions on Industry Application, 2008, 44(2): 624-633.
Gong Jinxia, Xie Da, Zhang Yanchi. Principle and performance of the three-phase digital phase-locked loop[J]. Transactions of China Electrotechnical Society, 2009, 24(10): 94-99, 121.
[10]
Rodriguez P, Pou J, Bergas J, et al. Decoupled double syn chronous reference frame PLL for power convert control[J]. IEEE Transactions on Industrial Electronics, 2007, 22 (2): 584-592.
[11]
Hsieh G C, Hung J C. Phase-locked loop techniques: A survey[J]. IEEE Transactions on Indus trial Electronics, 1996, 43(6): 609-615.
[12]
Costa D R, Rolim L G B, Aredes M, Analysis and software implementation of a robust synchronism circuit-PLL circuit[C], Proceedings of the IEEE Internatiomal Symposium on Industrial Electronics, San Antonio, TX USA, 2003.
[13]
Rolim L G B, da Costa D R, Aredes M. Analysis and software implementation of a robust synchronizing PLL circuit based on the pq theory[J]. IEEE Transac- tions on Industrial Electronics, 2006, 53(6): 1919-1926.
Xu Hailiang, ZhangWei. Synchronizing signal detection of fundamental voltage under unbalanced and/or distorted grid voltage conditions[J]. Automation of Electria Power Systems, 2012, 36(5): 90-95.
Hong Xiaoyuan Lü Zhengyu. Three-phase digital phase-locked loop based on synchronous reference frame[J]. Transactions of China Electrotechnical Society, 2012, 27(11):203-210.
[18]
Felice Liccardo, Pompeo Marino, Giuliano Raimondo. Robust and fast three-phase PLL tracking system[J]. IEEE Transactions on Industrial Electronics, 2011, 58(1): 222-231.
[19]
Francisco D Freijedo, Alejandro G Yepes. An optimized implementation of phase locked loops for grid applications[J]. IEEE Transactions on Instrumention and Measurement, 2011, 60(9):3110-3119.