New ternary adders, which are fundamental components of ternary addition, are presented in this paper. They are on the basis of a logic style which mostly generates binary signals. Therefore, static power dissipation reaches its minimum extent. Extensive different analyses are carried out to examine how efficient the new designs are. For instance, the ternary ripple adder constructed by the proposed ternary half and full adders consumes 2.33？μW less power than the one implemented by the previous adder cells. It is almost twice faster as well. Due to their unique superior characteristics for ternary circuitry, carbon nanotube field-effect transistors are used to form the novel circuits, which are entirely suitable for practical applications. 1. Introduction On-chip interconnections have become a serious challenge as more and more modules are packed into a chip. They dissipate lots of energy, increase response time, and cause coupling effects by adding more capacitance, resistance, and inductance to a circuit [1]. Multiple-valued logic (MVL) is an alternative solution to interconnect complexity and growing power dissipated by wires [2]. It reduces the amount of wires inside and outside a chip dramatically as more complex designs require a large number of wires for connecting circuit components. In addition, MVL has the high potential for increasing computational speed, reducing switching activity, and implementing many arithmetic and logic functions in a single chip [2, 3]. Among many MVL systems, ternary logic (also known as three-valued logic) has soared in popularity due to its simplicity and efficiency [4, 5]. In spite of potential superiorities of ternary logic, binary is still the dominant logic for circuit design in the industry. One of the main reasons is the intrinsic behaviour of transistors. The on-off characteristic of a transistor makes it an ideal device to implement Boolean algebra. However, dualism does not correspond to real-world applications effectively. Another reason why ternary logic is not as popular as its binary counterpart is mainly because of the lack of sufficient practical, high-performance logic gates and computational components. To make ternary logic applicable in practice, efficient circuits must be developed before all else. Voltage-mode MVL circuits are based on multithreshold designs [6, 7]. Therefore, traditional metal-oxide-semiconductor field-effect transistor (MOSFET) is not entirely suitable candidate for MVL implementation due to the fact that MOS devices are inherently single-threshold [8]. Since the introduction
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