Low-Power and Optimized VLSI Implementation of Compact Recursive Discrete Fourier Transform (RDFT) Processor for the Computations of DFT and Inverse Modified Cosine Transform (IMDCT) in a Digital Radio Mondiale (DRM) and DRM+ Receiver
This paper presents a compact structure of recursive discrete Fourier transform (RDFT) with prime factor (PF) and common factor (CF) algorithms to calculate variable-length DFT coefficients. Low-power optimizations in VLSI implementation are applied to the proposed RDFT design. In the algorithm, for 256-point DFT computation, the results show that the proposed method greatly reduces the number of multiplications/additions/computational cycles by 97.40/94.31/46.50% compared to a recent approach. In chip realization, the core size and chip size are, respectively, 0.84 × 0.84 and 1.38？×？1.38 mm 2. The power consumption for the 288- and 256-point DFT computations are, respectively, 10.2 (or 0.1051) and 11.5 (or 0.1176) mW at 25 (or 0.273) MHz simulated by NanoSim. It would be more efficient and more suitable than previous works for DRM and DRM + applications.
References
[1]
Digital Radio Mondiale; System Specification. ES 201 980 V3.1.1; European Telecommunications Standards Institute (ETSI): Nice, France, 2009.
[2]
Tai, S.C.; Wang, C.C.; Wang, J.L. Circuit-Sharing Design between FFT and IMDCT with Pipeline Structure for DAB Receiver. In Proceedings of the 17th International Conference on Advanced Information Networking and Applications, Xi’an, China, 27–29 March 2003; pp. 768–773.
[3]
Tai, S.C.; Wang, C.C.; Lin, C.Y. FFT and IMDCT circuit sharing in DAB receiver. IEEE Trans. Broadcast. 2003, 49, 124–131, doi:10.1109/TBC.2003.810072.
[4]
Wang, C.C.; Lin, C.Y. An Efficient FFT processor for DAB receiver using circuit-sharing pipeline design. IEEE Trans. Broadcast. 2007, 53, 670–677, doi:10.1109/TBC.2007.896962.
[5]
Kim, B.E.; Chung, J.Y.; Hwang, S.Y. An efficient fixed-point IMDCT algorithm for high-resolution audio appliances. IEEE Trans. Consum. Electron. 2008, 54, 1867–1872, doi:10.1109/TCE.2008.4711247.
[6]
Radio Broadcasting System: Digital Audio Broadcasting to Mobile Portable and Fixed Receiver; European Telecommunications Standards Institute (ETSI): Nice, France, 2006.
[7]
Digital Audio Broadcasting (DAB): Transport of Advanced Audio Coding (AAC) Audio; European Telecommunications Standards Institute (ETSI): Nice, France, 2007.
[8]
Lai, S.C.; Lei, S.F.; Luo, C.H. Low-Cost and Shared Architecture Design of Recursive DFT/IDFT/IMDCT Algorithms for Digital Radio Mondiale System. In Proceedings of IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP-2010), Darmstadt, Germany, 15–17 October 2010; pp. 276–279.
[9]
Chiang, H.C.; Liu, J.C. Regressive implementations for the forward and inverse MDCT in MPEG audio coding. IEEE Signal Process. Lett. 1996, 3, 116–118, doi:10.1109/97.489065.
[10]
Nikolajevic, V.; Fettweis, G. Computation of forward and inverse MDCT using Clenshaw’s recurrence formula. IEEE Trans. Signal Process. 2003, 51, 1439–1444, doi:10.1109/TSP.2002.808123.
[11]
Chen, C.G.; Liu, B.D.; Yang, J.F. Recursive architectures for realizing modified discrete cosine transform and its inverse. IEEE Trans. Circuits Syst. II 2003, 50, 28–45.
[12]
Nikolajevi？, V.; Fettweis, G. New Recursive Algorithms for the Forward and Inverse MDCT. In Proceedings of the IEEE Workshop on Signal Processing Systems: Design and Implementation (SiPS’2001), Antwerp, Belgium, 26–28 September 2001; pp. 51–57.
[13]
Nikolajevi？, V.; Fettweis, G. New recursive algorithms for the unified forward and inverse MDCT/MDST. J. VLSI Signal Process. Syst. 2003, 34, 203–208, doi:10.1023/A:1023292117679.
[14]
Fox, W.; Carriera, A. Goertzel Implementations of the Forward and Inverse Modified Discrete Cosine Transform. In Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE’2004), Niagara Falls, Canada, 2–5 May 2004; pp. 2371–2374.
[15]
Chen, C.H.; Wu, C.B; Liu, B.D.; Yang, J.F. Recursive Architectures for the Forward and Inverse Modified Discrete Cosine Transform. In Proceedings of the IEEE Workshop on Signal Processing Systems: Design and Implementation (SiPS’2000), Lafayette, LA, USA, 11–13 October 2000; pp. 50–59.
[16]
Cheng, Z.Y.; Chen, C.H.; Liu, B.D.; Yang, J.F. Unified Selectable Fixed-Coefficient Recursive Structures for Computing DCT, IMDCT and Subband Synthesis Filtering. In Proceedings of the IEEE International Symposium on Circuits and Systems, Vancouver, Canada, 23–26 May 2004; pp. 557–560.
[17]
Lei, S.F.; Lai, S.C.; Hwang, Y.T.; Luo, C.H. A High-Precision Algorithm for the Forward and Inverse MDCT Using the Unified Recursive Architecture. In Proceedings of the IEEE International Symposium on Consumer Electronics, Vilamoura, Algarve, 14–16 April 2008; pp. 1–4.
[18]
Lai, S.C.; Lei, S.F.; Luo, C.H. Common architecture design of novel recursive MDCT and IMDCT algorithms for application to AAC, AAC in DRM, and MP3 codecs. IEEE Trans. Circuits Syst. II 2009, 56, 793–797, doi:10.1109/TCSII.2009.2030527.
[19]
Lei, S.F.; Lai, S.C.; Cheng, P.Y.; Luo, C.H. Low complexity and fast computation for recursive MDCT and IMDCT algorithms. IEEE Trans. Circuits Syst. II 2010, 57, 571–575, doi:10.1109/TCSII.2010.2048380.
[20]
Wolkotte, P.T.; Smit, G.J.M.; Smit, L.T. Partitioning of a DRM Receiver. In Proceedings of the 9th International OFDM-Workshop, Dresden, Germany, 15–16, September 2004; pp. 299–304.
[21]
Goertzel, G. An algorithm for the evaluation of finite trigonometric series. Am. Math. 1958, 65, 34–35, doi:10.2307/2310304.
[22]
Yang, J.F.; Chen, F.K. Recursive discrete Fourier transform with unified IIR filter stluclures. Signal Process. 2002, 82, 31–41, doi:10.1016/S0165-1684(01)00156-6.
[23]
Van, L.D.; Yang, C.C. High-Speed Area-Efficient Recursive DFT/IDFT Architectures. In Proceedings of the IEEE International Symposium Circuits and System, Vancouver, Canada, 23–26 May 2004; pp. 357–360.
[24]
Van, L.D.; Yu, Y.C.; Huang, C.N.; Lin, C.T. Low Computation Cycle and High Speed Recursive DFT/IDFT: VLSI Algorithm and Architecture. In Proceedings of the IEEE Workshop on Signal Processing Systems, Athens, Greece, 2–4 November 2005; pp. 579–584.
[25]
Fan, C.P.; Su, G.A. Efficient recursive discrete Fourier transform design with low round-off error. Int. J. Electr. Eng. 2006, 13, 9–20.
[26]
Van, L.D.; Lin, C.T.; Yu, Y.C. VLSI architecture for the low-computation cycle and power-efficient recursive DFT/IDFT design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2007, E90-A, 1644–1652.
[27]
Meher, P.K.; Patra, J.C.; Vinod, A.P. Novel Recursive Solution for Area-Time Efficient Systolization of Discrete Fourier Transform. In Proceedings of the IEEE International Symposium on Signals, Circuits and Systems, Lasi, Romania, 12–13 July 2007; pp. 193–196.
[28]
Meher, P.K.; Patra, J.C.; Vinod, A.P. Efficient systolic designs for 1- and 2-dimensional DFT of general transform-lengths for high-speed wireless communication applications. J. Signal Process. Syst. 2010, 60, 1–14, doi:10.1007/s11265-008-0328-x.
[29]
Lai, S.C.; Lei, S.F.; Chang, C.L.; Lin, C.C.; Luo, C.H. Low computational complexity, low power, and low area design for the implementation of recursive DFT and IDFT algorithms. IEEE Trans. Circuits Syst. II 2009, 56, 921–925, doi:10.1109/TCSII.2009.2035267.
[30]
Lai, S.C.; Juang, W.H.; Chang, C.L.; Lin, C.C.; Luo, C.H.; Lei, S.F. Low-computation cycle, power-efficient, and reconfigurable design of recursive DFT for portable digital radio mondiale receiver. IEEE Trans. Circuits Syst. II 2010, 57, 647–651, doi:10.1109/TCSII.2010.2050950.
[31]
Lai, S.C.; Lei, S.F.; Juang, W.H.; Luo, C.H. A low-cost, low-complexity and memory-free architecture of novel recursive DFT and IDFT algorithms for DTMF application. IEEE Trans. Circuits Syst. II 2010, 57, 711–715, doi:10.1109/TCSII.2010.2056413.
[32]
Lai, S.C.; Juang, W.H.; Lin, C.C.; Luo, C.H.; Lei, S.F. High-throughput, power-efficient, coefficient-free and reconfigurable green design for recursive DFT in a portable DRM receiver. Int. J. Electr. Eng. 2011, 18, 137–145.
[33]
Hsiao, C.F.; Chen, Y.; Lee, C.Y. A generalized mixed-radix algorithm for memory-based FFT processors. IEEE Trans. Circuits Syst. II 2010, 57, 26–30, doi:10.1109/TCSII.2009.2037262.
[34]
Munch, M.; Wurth, B.; Mehra, R.; Sproch, J.; Wehnl, N. Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. In Proceedings of the IEEE Design Automation and Test, Paris, France, 27–30 March 2000; pp. 624–631.
[35]
Baas, B.M. A low-power, high-performance, 1024-Point FFT processor. IEEE J. Solid-State Circuits 1999, 34, 380–387.
