Real-Time Implementation of Change Detection for Automated Video Surveillance System

Change detection is one of the several important problems in the design of any automated video surveillance system. Appropriate selection of frames of significant changes can minimize the communication and processing overheads for such systems. This research presents the design of a VLSI architecture for change detection in a video sequence and its implementation on Virtex-IIPro FPGA platform. Clustering-based scheme is used for change detection. The proposed system is designed to meet the real-time requirements of video surveillance applications. It robustly detects the changes in a video stream in real time at 25 frames per second (fps) in gray scale CIF size video. 1. Introduction Automated video surveillance systems are gaining importance due to their capability of performing automatic scene analysis. These systems can automatically select the frames of interest in a video stream by using scene change detection algorithms. The main challenge for designing these systems lies in their real-time performance requirements [1]. The software implementation of change detection algorithm running on general purpose processors could not achieve the frame rates required for real-time processing of a video stream for surveillance applications. Due to this reason, one needs to explore the different technologies possible for implementing real-time change detection system. One solution is to use special purpose digital signal processors, which are designed to execute some low level image processing operations very fast [2]. But the application like change detection uses a large range of low, medium, and high level operations. Therefore, this is not a good solution for achieving real-time performance. Alternative solutions are the design of application-specific integrated circuit (ASIC) or application-specific instruction set processor (ASIP) for change detection algorithm or use of field programmable logic devices. The main advantages of FPGAs (field programmable gate arrays) over ASIC and ASIP are their ability to allow modification in the design in later stages of system development, architectural efficiency in terms of parallelism, shorter design time, cost efficiency, and real-time performance (high throughput). These features make FPGAs a suitable choice for implementing change detection in real time. This paper presents the design of a VLSI architecture for real-time change detection in a video stream and its FPGA implementation. Different algorithms have been proposed in the literature for change detection. A review can be found in [3]. These algorithms use