In this paper, we present and compare efficient low-power hardware architectures for accelerating the Packet Data Convergence Protocol (PDCP) in LTE and LTE-Advanced mobile terminals. Specifically, our work proposes the design of two cores: a crypto engine for the Evolved Packet System Encryption Algorithm (128-EEA2) that is based on the AES cipher and a coprocessor for the Least Significant Bit (LSB) encoding mechanism of the Robust Header Compression (ROHC) algorithm. With respect to the former, first we propose a reference architecture, which reflects a basic implementation of the algorithm, then we identify area and power bottle-necks in the design and finally we introduce and compare several architectures targeting the most power-consuming operations. With respect to the LSB coprocessor, we propose a novel implementation based on a one-hot encoding, thereby reducing hardware’s logic switching rate. Architectural hardware analysis is performed using Faraday’s 90？nm standard-cell library. The obtained results, when compared against the reference architecture, show that these novel architectures achieve significant improvements, namely, 25% in area and 35% in power consumption for the 128-EEA2 crypto-core, and even more important reductions are seen for the LSB coprocessor, that is, 36% in area and 50% in power consumption. 1. Introduction New data-demanding mobile applications, such as video streaming and online gaming, are the main drivers for higher mobile data rates. New standards improve the mobile Internet experience by providing downlink data rates starting from 100？Mbit/s in LTE up to 1？Gbit/s for LTE-Advanced [1]. This huge increase in data rates imposes new challenges on the design of mobile devices, where computational power and battery lifetime are strictly limited. A recent uplink/downlink performance analysis of an LTE protocol stack on a representative virtual mobile platform [2, 3] has identified the Protocol Data Convergence Protocol (PDCP) as the most time-critical component within the Layer 2 software architecture. PDCP incorporates two computationally expensive tasks: the Robust Header Compression (ROHC) algorithm, which compresses IP packet headers in order to improve the spectral efficiency of radio links, and the ciphering algorithm, responsible for user data protection and for providing a secure communication towards the core network. While both protocol functions show long processing times, ciphering comes in the first place followed by ROHC. Apart from performance requirements, PDCP algorithms must be designed for low-power
References
[1]
The 3rd Generation Partnership Project (3GPP), http://www.3gpp.org.
[2]
D. Szczesny, S. Hessel, A. Showk, A. Bilgic, U. Hildebrand, and V. Frascolla, “Performance analysis of LTE protocol processing on an ARM based mobile platform,” in Proceedings of the 11th International Symposium on System-on-Chip (SoC '09), pp. 56–63, Tampere, Finland, October 2009.
[3]
D. Szczesny, S. Hessel, A. Showk, A. Bilgic, U. Hildebrand, and V. Frascolla, “Joint uplink and downlink performance profiling of LTE protocol processing on a mobile platform,” International Journal of Embedded and Real-Time Communication Systems, vol. 1, no. 4, pp. 21–39, 2010.
[4]
ARM Limited, "ARM11 MPCore Processor Technical Reference Manual", Lit.Nr.: ARM DDI, 0360D, 2006.
[5]
M. E. Gonzalez, A. Bilgic, A. Lackorzynski, D. Tudor, E. Matus, and I. Badr, “ICT-eMuCo. An innovative solution for future smart phones,” in Proceedings of the IEEE International Conference on Multimedia and Expo (ICME '09), pp. 1821–1824, New York, NY, USA, July 2009.
[6]
A. Showk, F. Bruns, S. Hessel, A. Bilgic, and I. Badr, “Optimal resource management for a model driven LTE protocol stack on a multicore platform,” in Prpceedings of the ACM International Symposium on Mobility Management and Wirelss Access (MobiWac '10), pp. 91–98, Bodrum, Turkey, October 2010.
[7]
A. Showk, S. Traboulsi, D. Szczesny, and A. Bilgic, “Balancing LTE protocol load on a multi-core hardware platform using EFSM migration,” in Proceedings of the 6th International Multi-Conference on Computing in the Global Information Technology (ICCGI '11), pp. 76–83, Luxembourg, Germany, June 2011.
[8]
M. Hill and M. Marty, “Amdahl's law in the multicore era,” Computer, vol. 41, no. 7, pp. 33–38, 2008.
[9]
J. Rabaey, Low Power Design Essentials, Springer, New York, NY, USA, 2009.
[10]
M. Ouellette and D. Connors, “Analysis of hardware acceleration in reconfigurable embedded systems,” in Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS '05), Denver, Colo, USA, April 2005.
[11]
C. H. van Berkel, “Multi-Core for mobile phones,” in Proceedings of the Design, Automation & Test Europe (DATE '09), pp. 1260–1265, Nice, France, April 2009.
[12]
O. Silven and K. Jyrkk, “Observations on power-efficiency trends in mobile communication devices,” EURASIP Journal of Embedded Systems, vol. 2007, no. 1, 17 pages, 2007.
[13]
S. Hessel, D. Szczesny, S. Traboulsi, A. Bilgic, and J. Hausner, “On the design of a suitable hardware platform for protocol stack processing in LTE terminals,” in Proceedings of the 7th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC '09), pp. 1–8, Vancouver, Canada, August 2009.
[14]
D. Szczesny, S. Hessel, F. Bruns, and A. Bilgic, “On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices,” in Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '09), pp. 155–162, Grenoble, France, October 2009.
[15]
S. Hessel, D. Szczesny, F. Bruns, A. Bilgic, and J. Hausner, “Architectural analysis of a smart DMA controller for protocol stack acceleration in LTE terminals,” in Proceedings of the IEEE 72nd Vehicular Technology Conference Fall (VTC '10), pp. 1–5, Ottawa, Canada, September 2010.
[16]
P. Kitsos, G. Selimis, and O. Koufopavlou, “High performance ASIC implementation of the SNOW 3G stream cipher,” in Proceedings of the International Conference on Very Large Scale Integration (VLSI-SOC '08), Rhodes Island, Greece, October 2008.
[17]
P. Kitsos, N. Sklavos, and A. N. Skodras, “An FPGA implementation of the ZUC stream cipher,” in Proceedings of the 14th Euromicro Conference on Digital Systems (DSD '11), Oulu, Finland, August 2011.
[18]
Z. Liu, L. Zhang, J. Jing, and W. Pan, “Efficient pipelined stream cipher ZUC algorithm in FPGA,” in Proceedings of the 1st International Workshop on ZUC Algorithm, Beijing, China, December 2010.
[19]
S. Traboulsi, V. Frascolla, N. Pohl, J. Hausner, and A. Bilgic, “Power analysis and optimization of the ZUC stream cipher for LTE-advanced mobile terminals,” in Proceedings of the 3rd IEEE Latin American Symposium on Circuits and Systems (LASCAS '12), Playa del Carmen, Mexico, February 2012.
[20]
S. Traboulsi, V. Frascolla, N. Pohl, J. Hausner, and A. Bilgic, “A versatile low-power ciphering and integrity protection unit for LTE-advanced mobile devices,” in Proceedings of the 10th IEEE International NEWCAS Conference (NEWCAS '12), Montreal, Canada, June 2012.
[21]
S. Tillich, M. Feldhofer, T. Popp, and J. Gro？sch？dl, “Area, delay, and power characteristics of standard-cell implementations of the AES S-box,” Journal of Signal Processing Systems, vol. 50, no. 2, pp. 251–261, 2008.
[22]
S. Morioka and A. Satoh, “An optimized S-Box circuit architecture for low power AES design,” in Proceedings of the 4th International Workshop on Cryptographic Hardware and Embedded Systems (CHES '02), vol. 2523 of Lecture Notes in Computer Science, pp. 172–186, 2002.
[23]
G. Bertoni, M. Macchetti, and L. Negri, “Power-efficient ASIC synthesis of cryptographic sboxes,” in Proceedings of the 14th ACM Great Lakes Symposium on VLSI (GLSVLSI '04), pp. 277–281, April 2004.
[24]
S. Hessel, D. Szczesny, N. Lohmann, A. Bilgic, and J. Hausner, “Implementation and benchmarking of hardware accelerators for ciphering in LTE terminals,” in Proceedings of the IEEE Global Telecommunications Conference (GLOBECOM '09), Honolulu, Hawaii, USA, December 2009.
[25]
S. Traboulsi, M. Sbeiti, D. Szczesny, A. Showk, and A. Bilgic, “High-performance and energy-efficient sliced AES multi-block encryption for LTE mobile devices,” in Proceedings of the International Conference on Computer and Communication Devices (ICCCD '11), Bali, Indonesia, April 2011.
[26]
S. Traboulsi, M. Sbeiti, F. Bruns, S. Hessel, and A. Bilgic, “An optimized parallel and energy-efficient implementation of SNOW 3G for LTE mobile devices,” in Proceedings of the IEEE 12th International Conference on Communication Technology (ICCT '10), pp. 535–538, Nanjing, China, November 2010.
[27]
A. Showk, S. Traboulsi, and A. Bilgic, “An energy efficient multi- core modem architecture or LTE mobile terminals,” in Proceedings of the The New Technologies, Mobility and Security Conference (NTMS '12), Istanbul, Turkey, May 2012.
[28]
D. Szczesny, S. Traboulsi, F. Bruns, S. Hessel, and A. Bilgic, “Acceleration concepts for the ROHCv2 in LTE handsets,” in Proceedings of the 6th International Symposium on Industrial Embedded Systems (SIES '11), Vasteras, Sweden, June 2011.
[29]
D. E. Taylor, A. Herkersdorf, A. D？ring, and G. Dittmann, “Robust header compression (ROHC) in next-generation network processors,” IEEE/ACM Transactions on Networking, vol. 13, no. 4, pp. 755–768, 2005.
[30]
S. Traboulsi, W. Zhang, D. Szczesny, A. Showk, and A. Bilgic, “An energy-efficient hardware accelerator for robust header compression in LTE-advanced terminals,” in Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL '12), Oslo, Norway, August 2012.
[31]
K. Lahiri and A. Raghunathan, “Power analysis of system-level on-chip communication architectures,” in Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '04), pp. 236–241, Stockholm, Sweden, September 2004.
[32]
G. Stitt, R. Lysecky, and F. Vahid, “Dynamic hardware/software partitioning: a first approach,” in Proceedings of the 40th Design Automation Conference (DAC '03), pp. 250–255, Anaheim, Calif, USA, June 2003.
[33]
“Evolved universal terrestrial radio access (E-UTRA): packet data convergence protocol (PDCP) specification, 3GPP Std,” TS 36.323, Rev. 8.6.0, 2009.
National Institute of Standards Technology, “NIST Special Publication 800-38A: Recommendation for Block Cipher Modes of Operation—Methods and Techniques,” December 2001.
[36]
National Institute of Standards Technology, FIPS Publication 197: Advanced Encryption Standard (AES), November 2001.
[37]
C. Bormann, C. Burmeister, M. Degermark et al., “Robust header compression (ROHC): framework and four profiles: RTP, UDP, ESP, and uncompressed,” RFC 3095, 2001.
[38]
The Internet Engineering Task Force (IETF), http://www.ietf.org.
[39]
G. Pelletier and K. Sandlund, “Robust header compression version 2 (ROHCv2): profiles for RTP, UDP, IP, ESP and UDP-Lite,” RFC 5225, 2008.
[40]
V. Venkatachalam and M. Franz, “Power reduction techniques for microprocessor systems,” ACM Computing Surveys, vol. 37, no. 3, pp. 195–237, 2005.
[41]
Synopsys Inc, http://www.synopsys.com.
[42]
C. Talarico, J. V. Rosenblit, V. Malhotra, and A. Sitter, “A new framework for power estimation of embedded systems,” Computer, vol. 38, pp. 71–78, 2005.
