Electrical Characterization of TiO2 Insulator Based Pd / TiO2 / Si MIS Structure Deposited by Sol-Gel Process

Electrical characterization of a Pd / TiO2 / Si MIS structure has been reported in this paper. The TiO2 layer has been deposited on n-Si substrate by spin coating sol-gel process using Titanium Tetraisopropoxide [Ti(OC3H7)4]. The current-voltage and capacitance-voltage characteristics were studied at room temperature (300 K) by applying the dc bias gate voltage swept from – 3 to 3 V for the frequency range of 50 kHz to 1 MHz. The study reveals that the capacitance in the accumulation region has frequency dispersion in high frequencies (> 10 kHz) which is attributed to leakage behavior of TiO2 insulating layer, interface states and oxide defects. Different models of current conduction mechanism have been applied to study the measured data. It is found that Schottky-Richardson (SR) emission model is applicable at low bias voltage, Frenkel-Poole (FP) emission model at moderate bias voltages while Fowler-Nordheim (FN) tunneling dominates at higher bias voltages. TiO2 based MIS devices having high dielectric constant and good interface quality with Si substrate are expected to play a major role in microelectronic applications.