FPGA Based Area And Throughput Implementation of JH And BLAKE Hash Function

Implementation of area and throughput of the main building block (compression function) for two SHA-3 candidates BLAKE and JH hash function. The National Institute of Standards and Technology (NIST) has started a competition for a new secure hash standard. A significant comparison between the submitted candidates is only possible, if third party implementations of all proposed hash functions are provided[5]. The BLAKE family contains the four hash function BLAKE-28, BLAKE-32, BLAKE-48, BLAKE-64 with the bit length of their digests being 224,256,384 and 512 , respectively and JH contains JH-224, JH-256, JH-384, JH-512.We use the proposed block diagram of JH and BLAKE compression function and find fixed size message digest from binary string of arbitrary length. The compression function of BLAKE-256 takes as the input four values chain value(h) , message block(m), salt(s) and counter(t). AES design methodology is used in JH design and the BLAKE hash function HAIFA iteration mode[7]. In this paper FPGA implementation is based on two cryptographic hash function candidates BLAKE[6] and JH. and also compare the functions which is used in JH and BLAKE and then extract the important advantages, limitations, algorithms and design principals of both candidates.