Estimation of Hardware Complexity of Residue Number System for Signal Processing Application

Residue Number System (RNS) are becoming popular for designing high performance DSP processors because of their ability to offer carry free arithmetic operation. The carry free operations lead to concurrent execution of arithmetic operations on the residues.However in RNS, moduli selection is one of the most important parameter that determines bit efficiency, area, power consumption, speed etc. The novelty of the architecture is shown by comparison the different schemes reported in the literature. Also a Ranking method is proposed using which moduli sets can be ranked in terms of bit efficiency & hardware complexity.