Area Efficient Rapid Signal Acquisition scheme for High Doppler DSSS Signals

The Direct Sequence Spread Spectrum (DSSS) communication system is widely used in ground to airmissile links due to its anti-jam and low Signal to Noise Ratio (SNR) requirement advantages. The paperpresents the challenges in achieving fast signal acquisition in this scenario and brings out theimplementation challenges for achieving simultaneous Doppler estimation and phase delay of PseudoNoise (PN) code. A new scheme for PN code phase delay estimation with correlation of differential signals,followed by precise Doppler estimation using Fast Fourier Transform (FFT) is presented. The areaoptimized Field Programmable Gate Array (FPGA) friendly architecture is utilized for rapid signalacquisition by combining both time and frequency domain approaches. The advanced design practices inFPGAs are used to achieve resource sharing and high clock speed of operation. The architecture issynthesized for Virtex-6 LX240T FPGA, resulting in 52% of area occupancy and 134 MHz of maximumallowed clock frequency value.