DESIGEN AND ANALYSIS OF LOW-VOLTAGE ANALOG MULTIPLEXER USING FOUR-QUADRIC 50 nm CMOS TECHNOLOGY

A new high frequency low voltage four-quadrant analog multiplier Circuit on voltage mode is presented. The multiplier has gigahertz frequency response is suitable to use in communication system. The circuit is based on 50 nm CMOS technology simulated using Hspice software. The circuit operates using the supply voltage of ±1V and the cut off frequency is 9.6 GHz. This technique provides: GHz bandwidth response and low power consumption.