The Ramped-step Voltage in Adiabatic Logic Circuits: Analysis of Parameters to Further Reduce Power Dissipation

Ramped-step voltage supplies are widely used in adiabatic switching. However, the set of analytical parameters available for understanding these voltage supplies is still limited. Our objective is to identify the parameters that have an effect on lowering power dissipation. Our results show that power dissipation can be significantly reduced using adiabatic logic, by increasing the charging and discharging times and by reducing the peak current flow through the transistors. The phenomenon of energy recovery is also demonstrated. A maximum of 40% reduction in the total power dissipation is shown from this analysis.