Design and Simulation of a Circuit to Predict and Compensate Performance Variability in Submicron Circuit

This paper presents a technique forcompensating process, voltage and temperature variationsdue to manufacturing and environmental variability insubmicron circuits using canary flip-flop. This canary flipflop predicts the timing error before it actually occurs andcompensate the performance so that the system performancedoes not get affected. I am going to design a 16-bitBrent-Kung adder in 45-nm CMOS technology , whoseperformance will be controlled by supply voltage scaling.We will show that this technique can compensate process,supply voltage, and temperature variations and improve theenergy efficiency of submicron circuits. We also comparePower dissipation for Worst case design and performancecompensate design and show performance design has lesspower dissipation when compared to worst case design.