Improved Irregular Augmented Shuffle Multistage Interconnection Network

Parallel processing is the information processing that emphasized the concurrent manipulation of data elements belonging to one or more processors to solve a single problem. The major problem to achieve high-level parallelism is the construction of an interconnection network to provide interprocess communication. One of the biggest issues in the development of such a system is to developed fault tolerant architecture and effective algorithms to analyze its characteristics. An irregular class of Fault Tolerant Multistage Interconnection Network (MIN) called Improved Irregular Augmented Shuffle Network (IIASN) is proposed. The characteristics of some popular irregular class of Multistage Interconnection Networks along with proposed IIASN network which is based on IASN[11] Network are also analyzed in this pape